Project Title | DESIGN OF FAULT-TOLERANT VLSI SYSTEMS FOR APPLICATIONS IN SATELLITE COMMUNICATION (DFV) |
Reference Number | IIT/SRIC/R/DFV/2013/173, DATED 7th November, 2013 |
Temporary Position(s) | i)Senior Project Officer (SPO) ii)Project Assistant (PA) |
Number of vacancies | i)2 ii)1 |
Consolidated Compensation | i)SPO: Rs. 18,000/-p.m. to Rs. 20,000/-p.m (depending upon qualification & experience) ii)PA: Rs. 8,000/-p.m. to Rs. 10,000/-p.m (depending upon qualification & experience). |
Coordinator / PI | Dr. Anindya Sundar Dhar, Dept of E & ECE |
Qualifications & Experience | i)SPO : B.E. / B.Tech. in Electronics and Telecommunication Engineering or M.E. / M.Tech. in Electronics and Telecommunication Engineering with specialization in VLSI Design. Candidates must have strong knowledge in Digital design using FPGA and must possess at least 65% aggregate marks (or CGPA of at least 7.0 out of 10) in all the examinations starting from Higher secondary or equivalent. Experience in handling of FPGA hardware boards will be preferred. ii)PA : B.Sc. in pure science or Diploma in Electrical / Electronics Engineering with proficiency in computer softwares such as Word, Powerpoint and Excel. Experience in making Electronic system prototypes and preparation of documents for R&D projects will be preferred. |
Relevant Experience | |
Last Date | 30 Nov 2013 |
Application Fee | Demand Draft for Rs.50/- (Not for female and candidates) drawn in favour of IIT Kharagpur payable at |
CAREER
Sunday, 17 November 2013
Indian Institute of Technology, Kharagpur: Senior Project Officer & Project Assistant
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