- Formal Validation Graduate Intern
Qualification: Postgraduate or PhD (Must be pursuing it at the time of hiring).
- Component Design Engineer
Qualifications: Bachelors with 2+ years or Masters with 0 to 1+ years experience.
- SoC Firmware and Software ArchitectQualification: Must have a MS or PhD in Electrical Engineering or related technical discipline.
Experience: Minimum 5 years of experience in multiple technology areas (Embedded system, wireless communication and/or multimedia processing and/or security) and system operations with a track record of technical contributions and inventions
- Sr. Component Design Engineer
Qualification: Masters or Bachelors degree in Computer Engineering or Computer Science. Experience: 10 + years of related experience with EDA/ CAD tool support and development.
- Logic Design EngineerQualification:Master of Science (or a Master of Technology) degree in Electronics and or Electrical Engineering or a Bachelor of Science (Bachelor of Technology) degree in electronics and or Electrical Engineering.
Experience: At least 2 years in System Verilog or Verilog coding, required. Knowledge of Static timing analysis highly desired. Location: Bangalore
For more details, please visit: intel.taleo.net/careersection/10000/jobsearch.ftl
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